PS2: More experiments
Experimenting I found out that the problem is associated with chip being set to 12-clock mode. In this mode, the Timer2 clock is fosc/2 rather than fosc; hence it is impossible to set the proper reload value for 57600bps @ 12MHz (which would be 6.5). Setting the chip to 6-clock mode, it is possible to operate the UART at 57600bps @ 12MHz; but due to inherent uncertainty in determining the baudrate with the autobaud routine it sometimes works and sometimes not (experiments gave me a 1:1 ratio).
Nevertheless, the chip is set at 12-clock from the factory, so it is impossible to change the double-clock bit via ISP at 57600bps @ 12MHz.
The Philips datasheet is far from being crystal clear as the Timer2 operation as baudrate generator - the picture contains a ":2 box" between oscillator pin and timer counter; while the following text states several times, that the input frequency is fosc - and it is mentioned nowhere that this is clock-doubling dependent.
Although the operation of chip and unclear datasheet is not Andrew's problem, the resulting unclarity as per bootloader operation is (at least he needs answer questions like these).
Jan Waclawek
Experimenting I found out that the problem is associated with chip being set to 12-clock mode. In this mode, the Timer2 clock is fosc/2 rather than fosc; hence it is impossible to set the proper reload value for 57600bps @ 12MHz (which would be 6.5). Setting the chip to 6-clock mode, it is possible to operate the UART at 57600bps @ 12MHz; but due to inherent uncertainty in determining the baudrate with the autobaud routine it sometimes works and sometimes not (experiments gave me a 1:1 ratio).
Nevertheless, the chip is set at 12-clock from the factory, so it is impossible to change the double-clock bit via ISP at 57600bps @ 12MHz.
The Philips datasheet is far from being crystal clear as the Timer2 operation as baudrate generator - the picture contains a ":2 box" between oscillator pin and timer counter; while the following text states several times, that the input frequency is fosc - and it is mentioned nowhere that this is clock-doubling dependent.
Although the operation of chip and unclear datasheet is not Andrew's problem, the resulting unclarity as per bootloader operation is (at least he needs answer questions like these).
Jan Waclawek