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Hi all,

I found that the current version of FlashMagic (V13.50) corrupts location 0x001C on bank B if "Activate Bank A" is checked. FlashMagic erases the chosen Flash blocks, then programs bank A, then programs bank B and then sends the ISP command to activate bank A. According to the NXP user manual this ISP activation command generates and writes the correct vector table checksum on location 0x001C for bank A and at the same time writes an invalid checksum (in fact 0x00000000) on location 0x001C on bank B. Dependant on what code is located at 0x001C this leads to the program to behave falsely or even crash.
Actually this is not a fault in FlashMagic itself, rather a bug in the design of the ISP command, but FlashMagic should work around it.
I suggest Flashmagic to change the order of operation: Erase the chosen sectors on the bank to be activated, program the bank to be activated, activate the bank, erase the chosen sectors on the other bank, program the other bank.

With older versions of FlashMagic (V9.80) one has to execute FlashMagic twice. One instance set to bank A and bank activation checked, the other instance set to bank B and bank activation unchecked. This process avoids corrupting the non-activated Flash bank and has worked fine for me.
Surprisingly neither version 13.50 nor version 9.80 shows an error when the corrupted code is verified. Obviously code location 0x001C is spared for verification on both banks.

Best regards
Werner

Hallo,

i found that FlashMagic 12.75 cannot erase/program an LPC2129 anymore. Reading device signature works well.

I took a terminal program in order to watch for differences between FlashMagic 11.20 (erase/program works well) and FlashMagic 12.75 and found that FlashMagic 12.75 sends an oscillator frequency of 0. With that the erase command stalls inside the LPC2129.

FlashMagic 11.20 has a field for an adjustble oscillator frequency which is filled with 12.000 MHz by default. The LPC2129 has no internal RC-oscillator but always runs on the external crystal. So the LPC2129 needs this number for the erase/program timing.
I tried to set the oscillator frequency to 0 in FlashMagic 11.20. Then the LPC2129 stalls again. Setting a frequency of 100 MHz makes erasing very slow.


FlashMagic 11.20 LPC2129 Erase all command, sent:
?Synchronized<\r><\n>12000<\r><\n>J<\r><\n>U 23130<\r><\n>P 0 16<\r><\n>E 0 16<\r><\n>

FlashMagic 12.75 LPC2129 Erase all command, sent:
?Synchronized<\r><\n>0<\r><\n>J<\r><\n>U 23130<\r><\n>P 0 16<\r><\n>E 0 16<\r><\n>

Hi,

When I start FlashMagic by double-clicking an .fmx-file a message comes up ("The project has been modified. Do you want to save it?"). I have to click "No", then the settings of the double-clicked .fmx-file are loaded. Is this the wanted behavior of FlashMagic? Older versions of FlashMagic worked well by double-clicking the old .fms-file.

Best regards
Werner

Hi Andy,

for the LPC1853 and other devices one can choose whether to access flash bank A or B. FlashMagic is able to take just the relevant parts of the hex file for programming.
It would be nice to have a third option "All" in order to program the entire flash in one step.

Hi,
when I try to program (or even blank check) Flash bank B on my LPC1853 (Rev '-'), I get an error message: "Device does not support operation (no flash memory)". But the LPC1853 does have 256kB Flash on Bank B.

The Display Memory command does work on bank B, of course it shows an empty memory, since I haven't been able to program it yet.

Hallo Andy,

i found a problem in flashmagic (Version V4.33.1397):
During programming flashmagic sends records of 64 bytes data plus some more for address, checksum etc. All bytes are sent with maximum speed without any gaps between them (just 1 stop bit).
The ISP bootloader resides in the top region of the flash and therfore cannot use RX/TX interrupts in conjunction with RAM buffers. Since the chip has to echo every received byte the bootloader can receive bytes only as fast as its transmissions are. If the chip's baud rate is slightly slower than flashmagic's baud rate and there are many bytes to receive (and to send back), at some time flashmagic overflows the bootloader and one byte is lost. Them programming stucks and a transmit/receive error occours. This also occous with the ICP-bridge at 19200 baud.

The tolerance of the LPC9xx RC-oscillator has become worse. In the beginning almost every LPC932 had +/-1%, now there are many LPCs with +/-2.5%


So now my question:
Is it possible to insert a time gap of 1 byte every 16 or 32 bytes? Then the chip would be able to catch up timing.

I've got a second question:
I modified the bootloader to autobaud up to 115200 baud. Who is the right person at NXP to make a suggestion?

Kind regards
Werner