LPC922 & Fash Magic-only writes once

Started by Mike L, April 14, 2005, 12:17:58 AM

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re NoTouch

if you are to use the LPC NoTouch read the 89Cxx NoTouch anyhow.  The text is not copied to the LPC version.



I have the same this problem too. And I cannot connect it after write it at the first.  


I like to ask you about to set "Device configulation" in the ISP mode?
I think may be set RESET pin is not property at first.


Andy Ayre

Did you change the device configuration? It takes effect after a reset, and if you changed it to use an external clock/crystal, then the device won't do much until you attach one. Same with the reset.

Embedded Systems Academy, Inc.
support at esacademy dot com


Thankyou for Andy

Now I get it at the "uraka"

In the Fash Magic set initial for device configuration as Input/Output pin for Reset Pin (Or not set Enable Reset Pin in ISP mode). So when you program it, you cannot reset it. Then it show that "Unable to connect... try changing baud rate...".

I suggest you that.

1. Before you write program it the LPCxxx chip by Fash Magic.
Check device configuration follow up 1) Enable Reset Pin and 2)Select clock at Internal RC Oscillator(7.373MHz+-2.5%)

2. If you write it yet. You use other programmer device (Exsample Parallel Programmer) and follow up 1) Enable Reset Pin 2)Select clock at Internal RC Oscillator(7.373MHz+-2.5%) at last 3) Set Including the ISP Code

3. When you able to connect with Fash Magic, Please check device configuration before write it any time.

Andy Ayre

It is always possible to use the pulse entry method to place the device into ISP mode, regardless of whether the reset pin is configured as reset or I/O. Likewise, ISP can be used with the internal RC oscillator or external crystal/clock.

Embedded Systems Academy, Inc.
support at esacademy dot com



I want to ask you any question.

1. In the IAP (In Aplication Program), there are many version. Some version is address FF00H for PGM_MTP and Other version is FF03H. What is it allright?
2. In the IAP service routine. Can I initial it or flash it's memory?
In the parallel program device (SuperProIII) limits at 1FFFH.
3. In the ISP (in system Program). Some version location of UCFG1,UCFG2 (Micro Config) and SEC0-SEC7 (Security Config) stay in FFF0H and FFF8H (IAP area) and other version stay in FD00H (ISP area) What is it collect?

Andy Ayre

1. I don't know anything about IAP beyond what is written in the user manuals. Later devices in the LPC9xx family had a different ISP entry point relative to the start of the memory used by the bootloader. Chances are Philips did the same thing with IAP. You need to check the user manual for the specific device you are using.

2. Sorry, I don't understand your question.

3. FFF0H. Use the latest start900.a51 from keil.com. Very old versions used a different (and incorrect) address.

Embedded Systems Academy, Inc.
support at esacademy dot com


    I use the SuperPro III to flash program into chip P89LPC932. That it limits memory to flash about 0000H-1FFFH (8 block memory page). So I cannot to write UCFG (Micro config) in the IAP area (FFF0H). In fact, I want to config about FOSC,CLKR,BOV,PRHI,RPD,WDTE and other.

Andy Ayre

There is no memory at FFF0H. It's simply a way of being able to include those settings in a hex file. When Flash Magic sees that record it programs UCFG1, security bits, etc.

Embedded Systems Academy, Inc.
support at esacademy dot com


At last, Now I cannot connect the chip via the Flash Magic. That is "Unable to connect... try changing baud rate...". So I cannot set anything.

Andy Ayre

Did you erase the bootloader using your parallel programmer? Did you program anything into UCFG1, UCFG1, BV, SB, etc. since it last worked?

Embedded Systems Academy, Inc.
support at esacademy dot com

Alessandro Rocchegiani

Hello Mongkol,

If you have a working parallel programming, you can try the following:

- download AN10337_1 "Adding ISP in source code" from philips website
- open the file LPC_ISP_8K_V04.A51 and add after the equate table
  a list of JMP 1F00h for all start page address
  CSEG AT 0000h
  JMP 1F00h
  CSEG AT 0100h
  JMP 1F00h
  .....    (repeat the sequence for all start page address)
- delete the line ORL AUXR1,#SRST following the RESET lable
- compile the file, full chip erase and program the device

In this way the MCU ( if isn't wrong) start in ISP whit any setting of BOOTVECT and BootStatusBit.

Then you can try use Flash Magic to restore correct setting.

(If don't work try whit external clock source)



I have the same problem using LPC922.

I haven't download any code on the LPC922, just checked and changed device configuration only:

- Uncheck "Enable Reset Pin"
- Uncheck "Enable Brownout Detection"
- All other left it as default.

Je Gold

Hi All,

This my understanding - apologies to all for any mis-interpretation.

There are 4 ways to program CODE  SPACE in the LATEST 20 pin or larger LPC900 parts  eg P89LPC920, 922, 931, 932A1, 935, 936, 938 etc

1. ISP    (In System Programming)  via UART of the micro

2. ICP   (In Chip Programming) via a Synchronous CLK, Data lines

3. Parallel Programmer

4.  IAP  (In Applications Programming)  - Your program executes and makes calls to the erase, and programming function calls available from IAP bootcode.

1. ISP

This requires the UART of the micro and a stable Osc source.  If you programmed an external Osc source... and don't have it connected, the next time you program it....  well the UART won't clock and ISP wont work... so remember your Osc source to make it work... the next time.

1.a A Fresh Untouched chip
A "fresh" untouched chip will jump in to ISP programming mode on powerup up  1st time

Je Gold


Another one....

1.d  ISP   UART Break Dectect

In your startup code like in the NoTouch example  you set a register bit.

Break detect is reported in the status register (SSTAT). A break is detected when
11 consecutive bits are sensed LOW. The break detect can be used to reset the device
and force the device into ISP mode.

So   4 Methods of getting in to ISP mode, 1 for ICP

Joe Gold.