XA-G49 reg.

[nitin52]

Hello,
Please refer to Lash Magic User Manual page 41 and the following lines.

"The following simplified circuit diagram for an 89C51RD2 is one possible way of connecting the DTR and RTS signals to RST and /PSEN of the device. Note that minor changes would have to be made to use this circuit with the XA devices."

It says minor changes are required for XA devices. I would like to know what are they. Thanks.
Nitin

[Andy Ayre]

The diagram was designed for 8051s with an active high reset. The XA-G49 has an active low reset. Please refer to the ISP section of the XA-G49 datasheet for the ISP entry requirements.

[Rons]

It's a little more involved than that. The EAN/WAIT pin is sampled on reset
and this will determine the memory configuration. Philips has a application
Note the talks about it. I use a 74LS74 in my designs.

[nitin52]

Thanks for the info.

[Rons]

Get App note AN96075. It will tell you everything.

[erikm]

x

[nitin52]

Hello Rons,
AN96075 is about using EAn/WAIT pin and not what I am looking for.
Nitin

[Rons]

Well, you had better understand AN96075. It deals with the "RST" pin.
As to your "minor changes". Reversing the reset capacitor and charging
resistor connections are all thats probably needed.

[nitin52]

Hello Rons,
Along with reversing the reset capacitor and charging resistor connections, we have to connect the input of 74LS125 tri state buffer to ground (VSS) insted of VCC.
Nitin

[erikm]

Reversing the reset capacitor and charging
resistor connections are all thats probably needed.

maybe, but I have yet to find ANY flash micro that does not occasionally "lose its memory" when reset by RC.

USE A SUPERVISOR CHIIP

Erik

[Rons]

!x

[nitin52]

Whats that Rons  !x