Author Topic: Flash Magic generate PSEN and RST Signal not stable for reset every time.  (Read 9629 times)

PatrickChiu

  • Jr. Member
  • **
  • Posts: 8
    • View Profile
Flash Magic generate PSEN and RST Signal not stable for reset every time.

My hardware . P89C61X2

PC win98 :

I use the oscilloscope to find wave edge width not stable

Normal reset
http://www.usync.tzo.com/right_reset.jpg

Error reset
http://www.usync.tzo.com/error_reset.jpg


I use the same hardware , but some time could reset 89c61x2 , and some time wrong.

Could you give me some advice

Thank you.

Best Regards,
Patrick Chiu

erikm

  • Guest
again, install NoTouch and get rid of all those pesky level things.

Erik

PatrickChiu

  • Jr. Member
  • **
  • Posts: 8
    • View Profile
Thank erikm , NoTouch is a pretty good idea .

But I already build the ISP Tool , and only one 89c61x2 can't  into ISP mode that can't burn NoTouch.

Does anyone have experience that adjust from Error reset to Normal.

Normal reset
http://www.usync.tzo.com/right_reset.jpg

Error reset
http://www.usync.tzo.com/error_reset.jpg

I've try adjust T1 and T2  that can't into isp mode .

Andy Ayre

  • ESAcademy Staff
  • Sr. Member
  • *****
  • Posts: 2190
    • View Profile
    • Embedded Systems Academy, Inc.
    • Email
What is signal number 1? What is signal number 2? Where in the circuit did you measure these from?

Embedded Systems Academy, Inc.
support at esacademy dot com

Andy Ayre

  • ESAcademy Staff
  • Sr. Member
  • *****
  • Posts: 2190
    • View Profile
    • Embedded Systems Academy, Inc.
    • Email
Also I don't see enough voltage and timing information in those images. Can you add it?

Embedded Systems Academy, Inc.
support at esacademy dot com

erikm

  • Guest
and only one 89c61x2 can't into ISP mode that can't burn NoTouch.

If it is only ONE chip of many, why do you not throw it away?
Is your time worth so little that you can spend hours on "saving" a few bucks?

After all, it might just be a defective chip

Erik

PatrickChiu

  • Jr. Member
  • **
  • Posts: 8
    • View Profile
Signal 1 => RESET
Signal 2 => PSEN

voltage = 5V
Time/div for error_reset.jpg is 1second
Time/div for normal_reset.jpg is 500ms

thank you , Andrew Ayre.

PatrickChiu

  • Jr. Member
  • **
  • Posts: 8
    • View Profile

I have 4 P89C61 chips.

But only write once and could not into isp mode again every chip.

I want to understand what's going on .

I think that PSEN and RESET timing issue to make the problem.

thanks , erikm.

Best Regards,
Patrick.

erikm

  • Guest
But only write once and could not into isp mode again every chip.

That indicates that your "kick inti ISP" method is faulty.  Factory fresh chips are already in ISP mode when you receive them so THAT is the time to install NoTouch.

I suggest you try to program them by manually (touching with wire) create the "kick" levels and see what happens.

I have not used the 61 series, but if they are like ther rest and you have a RC reset, you may need a parallel programmer to "fix" the chips.

Erik

Andy Ayre

  • ESAcademy Staff
  • Sr. Member
  • *****
  • Posts: 2190
    • View Profile
    • Embedded Systems Academy, Inc.
    • Email
I don't understand - why are the two signals on different timebases? That makes it pretty much impossible to see the relationship between the signals. Please generate the waveforms again using the same timebase for both. Don't forget to tell me what the new timebase used is.

Embedded Systems Academy, Inc.
support at esacademy dot com

PatrickChiu

  • Jr. Member
  • **
  • Posts: 8
    • View Profile
I find the answer.

Don't kick my ass , please. ^_^

I have 4 p89c61x2. But 3 chips need parallel programmer to "fix".

And only one chip use FM normally every time.

Thank you very much for  your kindly to help me .

Best Regards,
Patrick.