Messages

I have not noticed that they are out of order.  Right now I am assuming that they are in order.  I re-wrote the write-to-ram function so that it fills a buffer instead of calling uudecode() for every packet it received.  It worked better, but still not good enough.  Before the modification, it would get about 200-300 bytes into the 512 byte frame when it received the checksum packet.  After the modification, it would get about 300-400 bytes into the 512 byte frame when it received the checksum packet.  So it did help, but the packets are arriving faster than I can peel them off the hardware.

EDIT:
I should also point out that every other function seems to be working just fine.  Most of the other functions have a handshake process that waits for the microcontroller to respond.  The write to ram function is the only one that I have seen that sends multiple packets without an ack until the very end.

I am using the example ethernet bootloader firmware on a LCP2378 running at 48Mhz.  After the write command, FlashMagic proceeds to send 512 bytes, then the checksum.  Using wireshark, I see this occuring at a rate of about 20us per message.  The trouble is, the firmware is getting the checksum when it thinks it still has about half of the bytes to go.  So it is missing messages.

It does work using the ethernet bootloader tool supplied by NXP running in debug mode.  It does not work in regular mode.  I suspect that the debug mode works because it takes time to print all of the bytes to the text box on the GUI.

Could you please add a parameter that allows me to specify a delay between messages (if any)?  That would certainly help out debugging for some people (myself included), and allow lower clock frequencies on the processors.  Thank you!