Author Topic: Dbl clock error for 89V51  (Read 3698 times)

Harshadbhai Ukani

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Dbl clock error for 89V51
« on: September 16, 2004, 08:47:08 pm »
Dear Andy,

Will you please modify the message for attamting to reprogramme dbl clock bit for 89V51?.

We can read the dbl clock bit and if it is already in 6 clock mode, either display successful or say it is already in 6 clock mode.

If some attemps to clear the dbl clk bit, we can display it is not allowed. Why to give error?.

-Harshadbhai

Andy Ayre

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Re: Dbl clock error for 89V51
« Reply #1 on: September 17, 2004, 08:23:34 am »
The problem is that if the 6 clock bit is set and you reprogram it again, the device does not respond correctly. You wouldn't want Flash Magic to ignore incorrect responses from the device would you?

This should be fixed in a future rev of the 89V51/89LV51.

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