Author Topic: LPC1833 external SPI flash bootloader  (Read 5439 times)

krunalrao

  • Jr. Member
  • **
  • Posts: 3
    • View Profile
    • Email
Re: LPC1833 external SPI flash bootloader
« Reply #120 on: August 17, 2021, 10:05:44 pm »
I have mapped RAM Location with the LPC datasheet and the address is correct only. Really appreciate it, if you can simplify your answer.

Andy Ayre

  • ESAcademy Staff
  • Sr. Member
  • *****
  • Posts: 2190
    • View Profile
    • Embedded Systems Academy, Inc.
    • Email
Re: LPC1833 external SPI flash bootloader
« Reply #121 on: August 18, 2021, 09:14:32 am »
We provide examples for users to adapt. If you go down the route of adapting then we don't have your changes or your hardware so you will have to debug it yourself. The support for external flash is not plug-and-play because of all of the variables - it's a development task.

Andy
Embedded Systems Academy, Inc.
support at esacademy dot com

krunalrao

  • Jr. Member
  • **
  • Posts: 3
    • View Profile
    • Email
Re: LPC1833 external SPI flash bootloader
« Reply #122 on: August 19, 2021, 05:40:13 am »
I am very much aware that sample code is not a plug-and-play type.  I believe providing any information on the sample code will be okay for you. In the sample code, in the comment below lines are mentioned.

erasing, programming and verifying of SPIFI flash S25FL129P on
// Hitex LPC1800/LPC4300 evaluation board
// Adapted from code in NXP SPIFI Read/Write example
// see: http://sw.lpcware.com/?p=lpc18xx.git&a=tree
// $Id: FlashPrg.c 3895 2015-05-14 13:06:10Z andy $

I am not able to log in to this mentioned website. Do you have an NXP link for the same?

I assume that this andy is you only. S? now below is my main concern.

How can I find the exact RAM location to store the bootloader code.

I have tried the below code of descriptor, that does not work.

  0x80000000,                                  // programmable memory start address
  0x801FFFFF,                                  // programmable memory end address
  0x10000500,                                  // ram start address (for bootloader storage)
  0x10001FFF,                                  // ram end address (for bootloader storage)
  0x1000,                                     // programmable sector size in bytes
  0xFF,                                        // programmable memory erased value
  256,                                         // number of bytes to program at once
  115200,                                      // communication baudrate
  DESCRIPTOR_BOOTSTRAP_CORTEXUART,             // use ISP to download this bootloader
  115200,                                       // baudrate to use for downloading bootloader
  0,                                           // ram address for commmand mailbox (0 = not used)
  0,                                           // ram address for response mailbox (0 = not used)
  0,                 

To clear more, I am not asking something that I need to develop. I am asking which is already there in the sample code.

Looking forward to some detailed explanation!!!

Thanks in advance!!

Rao

Andy Ayre

  • ESAcademy Staff
  • Sr. Member
  • *****
  • Posts: 2190
    • View Profile
    • Embedded Systems Academy, Inc.
    • Email
Re: LPC1833 external SPI flash bootloader
« Reply #123 on: August 19, 2021, 08:53:24 am »
You don't find the RAM location, you choose the RAM location. You can put the bootloader at any location in RAM that you wish. The only requirement is that the start address in the descriptor matches your linker map file. The descriptor tells Flash Magic where in RAM to download the bootloader to and start execution from.

Andy
Embedded Systems Academy, Inc.
support at esacademy dot com